User-definable thermal drift voltage control oscillator

ABSTRACT

A voltage controlled oscillator that includes a slot-cut-microstrip-line coupled between a resonator, a tuning diode network and an active device and being operable to act as a common-coupling capacitor between the resonator, the tuning diode network and the active device.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of the filing date of U.S. Provisional Patent Application Nos. 60/527,957 filed Dec. 9, 2003; 60/528,670 filed Dec. 11, 2003; and 60/563,481 filed Apr. 19, 2004, the disclosures of which are hereby incorporated herein by reference.

BACKGROUND OF THE INVENTION

A voltage controlled oscillator (VCO) or oscillator is a component that can be used to translate DC voltage into a radio frequency (RF) voltage or signal. The magnitude of the output signal is dependent on the design of the VCO circuit and the frequency of operation is determined by a resonator that provides an input signal. Clock generation and clock recovery circuits typically use VCOs within a phase locked loop (PLL) to either generate a clock from an external reference or from an incoming data stream. VCOs affect the performance of PLLs. In addition, PLLs are typically considered essential components in communication networking as the generated clock signal is typically used to either transmit or recover the underlying service information so that the information can be used for its intended purpose. PLLs are also important in wireless networks as they enable the communications equipment to quickly lock onto the carrier frequency on which communications are transmitted.

The popularity of mobile telephones has renewed interest in and generated more attention in wireless architectures. This popularity has further spawned renewed interest in the design of low noise wideband oscillators. The recent explosive growth in the new families of cellular telephones and base stations using universal mobile telephone systems (UMTS) has stirred a need for developing an ultra-low noise oscillator with a fairly wide tuning range. The demands of wideband sources have generally increased telescopically because of the explosive growth of wireless communications. In particular, modern communication systems are typically multi-band and multi-mode, therefore requiring a wideband low noise source that preferably allows simultaneous access to DCS 1800, PCS 1900 and WCDMA (wideband code division multiple access) networks by a single wideband VCO.

The dynamic operating range and noise performance of a VCO may limit or affect the performance of the PLL itself, which in turn may affect the performance of the device in which the PLL is employed, e.g., RF transceivers, a cell phone, a modem card, etc. Broadband tunability of VCOs represents one of the more fundamental tradeoffs in the design of a VCO, impacting both the technology and the topology used. The dynamic time average quality factor (i.e., Q-factor) of the resonator as well as the tuning diode noise contribution affect the noise performance of a VCO. Furthermore, the dynamic loaded Q is, in general, inversely proportional to the operating frequency range of the VCO.

Despite the continuous improvement in VCO technology, low phase noise typically remains a bottleneck and poses a challenge to RF transceiver (transmitter-receivers) design. In addition, oscillator/VCO design typically poses a challenge to the RF trans-receiver system. This is typically considered due to the more demanding parameters of the VCO design: low phase noise, low power consumption and wide frequency tuning range.

Improvements in oscillator/VCO technology have continued with time, yielding ever-smaller sources with enhanced phase noise and tuning linearity but the phenomena of the thermal drift over the temperature range (−40° C. to +85° C.) has not been properly addressed. The wide operating temperature range of the oscillator/VCOs coupled with a general lack of information on the thermal drift-profile creates a need for the development of a uniform and user-definable thermal drift profile oscillator with a relatively low thermal drift over the wide operating temperature range and operating frequency band.

Usually, high-stability oscillators are built with a quartz crystal up to frequencies of several hundred megahertz. However, in order to achieve better stability and lower costs, the SAW (surface acoustic wave) resonator based oscillator is generally considered a better choice for an ultra low phase noise low thermal drift oscillator. SAW resonators are typically used in oscillators as a two-port resonator and have a relatively small pull-in range that usually does not support a sufficient tuning range to compensate for tolerances due to the circuit components and thermal drift over the operating temperature range (−40° C. to +85° C.). In addition, SAW devices are comparatively expensive compared to CROs (ceramic resonator based oscillator) and their availability and performance are limited to a selected frequency and narrow operating temperature range (−20° C. to +70° C.) making them unsuitable for operating in stringent temperature environments and/or low cost applications.

In addition, the thermal drift of a ceramic resonator based oscillator/VCOs is typically around 5–10 MHz over a temperature range of −40° C. to +85° C. The ceramic resonator based VCO is usually also susceptible to phase hits that may occur in a PLL.

Thus, there is a need for a user-definable thermal drift oscillator operable over a wide temperature range, which offers a cost-effective solution to the phase hit problem.

SUMMARY OF THE INVENTION

An aspect of the present invention is an oscillator. The oscillator preferably comprises an active device having first, second and third terminals and circuitry coupled between the first and second terminals of the active device. The circuitry is preferably operative to provide a bias voltage to the active device and feedback a select amount of phase noise to the active device.

The oscillator further preferably comprises a tuning diode coupled to the second terminal of the active device through a slot-cut-printed-board coupling network.

In accordance with this aspect of the present invention, the slot-cut-printed-board coupling network desirably acts as an evanescent mode buffer between a resonator coupled thereto and the active device.

Further in accordance with this aspect of the present invention, the slot-cut-printed-board coupling network operates to control a profile of the thermal drift of the active device or, in general, the oscillator.

Further still in accordance with this aspect of the present invention, a feedback capacitor is preferably coupled between the second and third terminals of the active device. In addition, the oscillator may further desirably comprise a first filter and a second filter coupled to the third terminal so as to provide two-stage regenerative filtering.

Further in accordance with this aspect of the present invention, the active device may comprise a bipolar transistor or a field effect transistor and the first, second and third terminals respectively comprise the collector, base and emitter nodes of either of the transistors.

Another aspect of the present invention is an oscillator that preferably comprises an active device and circuitry coupled between a resonator, a tuning diode network and the active device. The circuitry is preferably operable to act as a common-coupling capacitor between the resonator, the tuning diode network and the active device.

In accordance with this aspect of the present invention, the circuitry controls a thermal drift profile of the oscillator over an operating temperature range. In accordance with this aspect of the present invention, the circuitry desirably comprises a slot-cut-microstrip-line, whose dimensions are selectable to define a thermal profile of the oscillator.

Further in accordance with this aspect of the present invention, the circuitry acts as an evanescent-mode-buffer between the resonator and the active device. Further still, the tuning diode network is capacitively coupled to the circuitry.

Further in accordance with this aspect of the present invention, the resonator preferably comprises a ceramic resonator. Further still, the active device desirably comprises either a field effect transistor or a bipolar transistor.

In another aspect, the present invention comprises an apparatus comprising a phase lock loop for generating a clock signal used to transmit or recover information communicated from or to the apparatus. In addition, the phase lock loop preferably comprises a voltage-controlled oscillator for generating the clock signal. Most preferably, the voltage-controlled oscillator preferably comprises an active device; and a slot-cut-microstrip-line coupled between a resonator, a tuning diode network and the active device that is operable to act as a common-coupling capacitor between the resonator, the tuning diode network and said active device.

Preferably, the apparatus comprises a wireless device and most preferably comprises a cellular telephone. In addition, the apparatus may also comprise a personal digital assistant.

In another aspect, the present invention comprises an apparatus that comprises a phase lock loop for generating a clock signal used to transmit or recover information communicated from or to the apparatus. The phase lock loop desirably includes a voltage-controlled oscillator for generating the clock signal. The voltage controlled oscillator preferably comprises an active device; and a slot-cut-microstrip-line coupled between a resonator, a tuning diode network and the active device and operable to act as a common-coupling capacitor between the resonator, the tuning diode network and said active device. The apparatus may desirably comprise a wireless device, and most desirably comprises a cellular telephone. Further in accordance with this aspect of the present invention, the apparatus preferably comprises a personal digital assistant.

In another aspect, the present invention comprises a telephone. The telephone preferably comprises a phase lock loop for generating a clock signal used to transmit or recover information communicated from or to the telephone. The phase lock loop preferably comprises a voltage-controlled oscillator for generating the clock signal, the voltage controlled oscillator comprising, an active device; and circuitry coupled between a resonator, a tuning diode network and the active device and operable to act as a common-coupling capacitor between the resonator, the tuning diode network and said active device. In accordance with this aspect of the present invention, the information may be communicated over a wireless or wired network.

In a method aspect, the present invention comprises coupling a capacitor between a resonator, a tuning diode network and an active device; and operating the capacitor as an evanescent mode buffer between the resonator and the active device to compensate for drifts in an output frequency of the oscillator due to temperature changes.

The method may further desirably comprise biasing the active device at a predetermined voltage such that the capacitor maintains the predetermined voltage level by compensating for drifts in an output frequency of the oscillator due to temperature changes. Further in accordance with the method, the evanescent mode buffer compensates for drifts in the output frequency of the oscillator due to temperature changes by storing additional energy generated by the oscillator due to temperature changes.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A and 1B depict circuits of a tuning diode in accordance with an aspect of the present invention.

FIG. 2 depicts a schematic of an oscillator in accordance with an aspect of the present invention.

FIG. 3 depicts a schematic of an oscillator in accordance with an aspect of the present invention.

FIG. 4 depicts a schematic of an oscillator in accordance with an aspect of the present invention.

FIG. 5 illustratively depicts a user-definable thermal profile plot over the temperature range of −40° C. to +85° C. in accordance with an aspect of the present invention.

FIG. 6 illustratively depicts a user-definable thermal profile plot over the temperature range of −40° C. to +85° C. in accordance with an aspect of the present invention.

FIG. 7 illustratively depicts a user-definable thermal profile plot over the temperature range of −40° C. to +85° C. in accordance with an aspect of the present invention.

FIG. 8 illustratively depicts a user-definable thermal profile plot over the temperature range of −40° C. to +85° C. in accordance with an aspect of the present invention.

FIG. 9 depicts a schematic of an oscillator in accordance with an aspect of the present invention.

FIG. 10 illustratively depicts a phase noise plot of an oscillator implemented in accordance with an aspect of the present invention.

DETAILED DESCRIPTION

FIGS. 1A and 1B depict circuits that illustrate a tuning diode using resistors, capacitors and inductors. As shown in FIG. 1A, a tuning diode may be depicted as a two-port device (as shown, ports 1 and 2) having a resistor R_(s) connected to port 1 and in series with an inductor L_(s). R_(s) and L_(s) are connected in series to resistor R_(p) and a variable capacitor C_(j), which are in parallel with each other. C_(j) reflects the junction capacitance of the tuning diode and is variable in response to temperature changes. The circuit further includes a capacitor C_(c) in parallel with R_(s), L_(s) and C_(j) between ports 1 and 2 and an inductor L_(s), between port 2, C_(j), C_(c) and R_(p), as shown.

FIG. 1B shows a simplified equivalent circuit of a tuning diode and includes resistor R_(p) in parallel with capacitor C_(c). The capacitor C_(c) is also in series with resistor R_(s).

With reference to FIGS. 1A and 1B, the expression for the junction capacitance of the tuning diode under a reverse bias condition is given by:

${C_{j}\left( {ɛ_{r},d_{j},A,V} \right)} = {\frac{\mathbb{d}Q}{\mathbb{d}V} = {\frac{ɛ_{0}{ɛ_{r}(T)}A}{d_{j}} = \left\lbrack \frac{ɛ_{0}ɛ_{r}A}{\frac{\left\lbrack {2K_{s}{ɛ_{o}\left( {V_{bi} - V_{A}} \right)}} \right.}{q}\frac{\left. \left( {N_{A} + N_{D}} \right) \right\rbrack^{1/2}}{N_{A}N_{D}}} \right\rbrack}}$

Under the abrupt junction assumption, the depletion region thickness, d_(j), is given by:

$d_{j} = \left\lbrack {\frac{\left\lbrack {2K_{s}{ɛ_{o}\left( {V_{bi} - V_{A}} \right)}} \right.}{q}\frac{\left. \left( {N_{A} + N_{D}} \right) \right\rbrack^{1/2}}{N_{A}N_{D}}} \right\rbrack$

Where, N_(D) and N_(A) are the donor and acceptor volume densities. V_(bi) is the built-in potential and is given by:

$V_{bi} = {\left\lbrack \frac{kT}{q} \right\rbrack{\ln\left\lbrack \frac{N_{A}N_{D}}{n_{i}^{2}} \right\rbrack}}$

Under reverse bias conditions, the spacing d_(j) is a function of the applied voltage V_(A)<0 and this effect is used to produce a variable capacitor. The equivalent capacitance of a junction per unit area is given as:

${c\left( {q,B,ɛ} \right)} = {\frac{C_{j}\left( {ɛ_{r},d_{j},A} \right)}{A} = {{ɛ_{0}{ɛ_{r}(T)}\frac{\mathbb{d}E}{\mathbb{d}V}} = \left\lbrack \frac{{qB}\; ɛ^{({m + 1})}}{\left( {m + 2} \right)\left( {V + \phi} \right)} \right\rbrack^{1/{({m + 2})}}}}$ ${c\left( {q,B,ɛ} \right)} = \frac{ɛ_{o}ɛ_{r}}{\frac{\left\lbrack {2K_{s}{ɛ_{o}\left( {V_{bi} - V_{A}} \right)}} \right.}{q}\frac{\left. \left( {N_{A} + N_{D}} \right) \right\rbrack^{1/2}}{N_{A}N_{D}}}$ Q=∈₀∈_(r)(T)E

Where,

-   Q=Charge per unit area -   ε=ε₀ε_(r), ε_(r)=Dielectric constant -   A=Device cross sectional area -   d=Depletion layer width -   c=Capacitance per unit area -   m=Impurity exponent -   q=Charge -   B=Magnetic field -   T=Temperature -   V=Reverse voltage applied across the diode -   E=Electric field

Combining all the constant terms together, including the area of the diode, into the constant, C_(d), the expression for capacitance is given as:

${C_{j}\left( {ɛ_{r},d_{j},A,V} \right)} = \frac{C_{d}}{\left( {V + \phi} \right)^{\gamma}}$ C_(d)=C₀(φ)^(γ) C=C _(c) +C _(j)(ε_(r) ,d _(j) ,A,V)

Where,

γ=Capacitance exponent and depends on the doping geometry of the diode. Its value varies from ⅓ to 2 for Si (silica) diode. The value of γ for an abrupt junction diode is ½, but such diodes have a limited tuning ratio. For wideband tunability, a hyper abrupt junction diode is preferred, and value of γ is 1 or 2.

-   φ=The junction contact potential (0.7V for Si (silica)) -   C₀=Value of capacitance at zero voltage -   C_(c)=Case capacitance -   C_(j)=Junction capacitance

The tuning ratio (TR) is given by

${TR} = {\frac{C_{j}\left( {V_{2} = V_{\min}} \right)}{C_{j}\left( {V_{1} = V_{\max}} \right)} = \left\lbrack \frac{\left( {V_{1} + \phi} \right)}{\left( {V_{2} + \phi} \right)} \right\rbrack^{\gamma}}$

The oscillator frequency varies proportionally to 1/√C and for the linear tuning range junction capacitance should vary as 1/V² (γ=2). The frequency ratio is given as the square root of the tuning ratio TR.

The Q of the tuning diode is a function of the reverse bias voltage, frequency and temperature. The expression for the Q of the tuning diode is given by:

$Q = {{2{\pi\left\lbrack \frac{{Stored} - {Energy}}{{Dissipated} - {energy}} \right\rbrack}} = \frac{\omega\;{CR}_{p}^{2}}{R_{p} + R_{s} + {\omega^{2}C^{2}R_{s}R_{p}^{2}}}}$ $C = {\left\lbrack {C_{c} + {C_{j}\left( {ɛ_{r},d_{j},A,V} \right)}} \right\rbrack = {C_{c} + \frac{C_{d}}{\left( {V + \phi} \right)^{\gamma}}}}$

The Q of the tuning diode falls off at high frequency due to the series bulk-resistance R_(s) and can be expressed as

$\lbrack Q\rbrack_{{High} - {frequency}} = \left. {\left\lbrack \frac{\omega\;{CR}_{p}^{2}}{R_{p} + R + {\omega^{2}C^{2}R_{s}R_{p}^{2}}} \right\rbrack_{\omega\operatorname{>>}}\mspace{169mu} \approx \left\lbrack \frac{\omega\;{CR}_{p}^{2}}{\omega^{2}C^{2}R_{s}R_{p}} \right\rbrack}\Rightarrow{{\left\lbrack \frac{1}{\omega\;{CR}_{s}} \right\rbrack\lbrack Q\rbrack}_{{High} - {frequency}} \propto \frac{1}{R_{s}}} \right.$

The Q of the tuning diode falls off at low frequencies due to the back resistance of the reverse-biased diode R_(p) and can be expressed as:

$\lbrack Q\rbrack_{{Low} - {frequency}} = \left. {\left\lbrack \frac{\omega\;{CR}_{p}^{2}}{R_{p} + R_{s} + {\omega^{2}C^{2}{RR}_{p}^{2}}} \right\rbrack_{\omega\operatorname{<<}} \approx \left\lbrack \frac{\omega\;{CR}_{p}^{2}}{R_{p} + R_{s}} \right\rbrack}\Rightarrow{\omega\;{CR}_{p}} \right.$ [Q]_(Low-frequency)∝R_(p)

Where

-   R_(p)=Parallel resistance or back resistance of the diode -   R_(s)=Bulk resistance of the diode-device material -   L_(s)=Internal lead inductance -   L_(s′)=External lead inductance -   C_(c)=Case capacitance

As the junction-temperature increases, the leakage current increases and it lowers the back resistance R_(p) of the diode. The increase in the junction temperature causes a slight decrease in R_(s), but the effects of the decreasing R_(p) are greater and this forces the effective Q to decrease.

The change in the value of the capacitance of the tuning diode with respect to temperature causes frequency drifts of the oscillator/VCOs circuit. The change in the value of the capacitance with temperature can be given by:

C ∝ [T]^(T_(cc)) ${C(V)} = \frac{C(0)}{\left( {V + \phi} \right)^{\gamma}}$ $\frac{\mathbb{d}{C(V)}}{\mathbb{d}T} = {\frac{\gamma\;{C(0)}}{\left( {V + \phi} \right)^{({\gamma + 1})}}\frac{\mathbb{d}\phi}{\mathbb{d}T}}$ $T_{CC} = {{\left\lbrack \frac{1}{C(V)} \right\rbrack\left\lbrack \frac{\mathbb{d}{C(V)}}{\mathbb{d}T} \right\rbrack} = {- {\left\lbrack \frac{\gamma}{\left( {V + \phi} \right)} \right\rbrack\left\lbrack \frac{\mathbb{d}\phi}{\mathbb{d}T} \right\rbrack}}}$ ${\frac{\mathbb{d}\phi}{\mathbb{d}T} \approx {{- 2.3}\left( {{mV}/{\,^{0}C}} \right)}},{{for}\mspace{14mu}{{Si}({silica})}}$ Where T_(cc) is a temperature coefficient.

From above, the temperature coefficient T_(cc) is inversely proportional to the applied voltage and directly proportional to the diode slope γ. In addition, tuning diode capacitance increases with an increase in temperature, whereas capacitance drift decreases with an increase in reverse bias voltage, i.e., at a higher reverse voltage drift is at a minimum as compared to at a low reverse voltage. The capacitance constant C_(d) is a function of the geometric dimension and varies with the dielectric constant, which is also a function of temperature.

The net thermal drift of an oscillator/VCO is generally due to the tuning diode, active device, resonator and passive components in the oscillator circuitry. The approach of adding a negative temperature coefficient compensating capacitor typically does not compensate for the tuning diode temperature coefficient T_(cc) because the change in the capacitance is not constant, but instead varies with the applied reverse bias voltage across the tuning diode over the temperature. The general approach of nullifying the temperature dependency of the tuning diode's built-in contact potential φ by adding a forward bias diode or transistor-emitter-follower in series with the tuning voltage of the tuning diode network comes at the cost of higher phase noise and non-uniform thermal drift over the temperature range.

In accordance with an aspect of the present invention, the thermal drift is compensated for by introducing a common coupling-capacitor between a resonator, an active device and a tuning diode network of an oscillator. The coupling capacitor may comprise a slot-cut-microstripline or any other variable capacitive storage element. The slot-cut-microstripline controls the profile of the thermal drift and also acts as an evanescent-mode-buffer between the resonator and the active device, so that the time average dynamic loaded Q of the resonator is enhanced and provides low noise performance over the operating frequency band of the oscillator.

In particular, FIG. 2 shows an oscillator 200 in accordance with an aspect of the present invention. The oscillator includes a three-terminal device 210 having a first terminal 214, a second terminal 216 and a third terminal 218. The three-terminal device may comprise any three-terminal device that can provide a 180° phase shift between any two terminals and preferably includes a bipolar or field effect transistor. A feedback-bias network 224 is connected between the first and second terminals, 214, 216, respectively. A slot-cut-printed-board-coupling network 230 is coupled to the second terminal and to a tuning diode network 234. The slot-cut-printed-board-coupling network 230 is also coupled to a resonator 240. In addition, the oscillator 200 includes a feedback capacitor 244 between the second and third terminals, 216, 218, respectively, and a pair of filters, 250, 252 coupled in series to the third terminal 218. An output signal is taken between first filter 250 and second filter 252.

In accordance with this aspect of the present invention, the slot-cut-printed-board-coupling network 230 compensates for capacitance changes in the tuning-diode network 234 due to changes in operating temperature of the environment or the oscillator 200. In addition, and as discussed in further detail below, the slot-cut-printed-board-coupling network 230 may be implemented so as to define the thermal drift profile of the oscillator, i.e., the change in output frequency due to change in operating temperature. The physical dimensions of the slot-cut-printed-board may be chosen to define a particular thermal profile, e.g., see FIGS. 5–8. The slot-cut-printed-board-coupling network 230 also acts as an evanescent mode buffer between the resonator 240 and the three terminal device 210 by storing additional energy that may develop in the oscillator as the temperature changes. The additional energy is then typically released without increasing the phase noise of the output signal. In particular, the network 230 provides a storage element, e.g., a capacitor, that generally operates to store excess energy that may develop in the circuit due to temperature changes and releasing such energy so that phase noise performance of the oscillator is controlled during the temperature changes. For example, if the bias voltage increases due to a change in temperature, the capacitor assists in lowering the bias voltage to or near the optimal operating point.

Turning now to FIG. 3, there is illustrated a oscillator 300 in accordance with an aspect of the present invention. The oscillator includes an active device 310 having three terminals, 313, 315, 317. The active device 310 may comprise a bipolar transistor or field effect transistor wherein the first, second and third terminals 313, 315, 317 comprise, respectively, the collector, base and emitter nodes of the transistor. In general, the active device 310 may comprise any device that can provide a 180° phase shift between the first terminal 313 and second terminal 315.

The first terminal 313 is connected to a feedback-bias network 323. The network 323 includes a voltage source Vcc coupled to the first terminal 313 that is used for biasing the active device 310 by providing a predetermined voltage at the first terminal 313. The network 323 also includes a pair of transistors Q2, Q3 (which are illustrated as bipolar transistors, but may also be field effect transistors) and associated circuit elements such as capacitors, resistors and inductors that couple a selected amount of the signal from the first terminal 313 to the second terminal 315.

The second terminal 315 is also capacitively coupled to tuning network 329, slot-cut-printed-board-coupling capacitor 332 and a resonator 338. As shown, the tuning network 329, slot-cut-printed-board-coupling capacitor 332 and resonator 338 are coupled in parallel. In addition, the tuning network 329 is capacitively coupled via coupling capacitor 340. The slot-cut-printed-board-coupling capacitor 332 compensates for changes in the capacitance, which are in turn caused by the changes in the junction contact potential, e.g., dφ/dT, of the tuning network 329 as a result of changes in the operating temperature of oscillator 300 or the environment.

The oscillator 300 further includes a feedback capacitor 342 that is coupled to the third terminal 317 through a resistor 344 and to ground through capacitor 348. Capacitor 342, resistor 344 and capacitor 348 together form a network that feeds back a select portion of the signal from the third terminal 317 to the second terminal 315. The oscillator 300 also includes a pair of filters 356, 358 coupled to the third terminal 317 that provide two-stage regenerative filtering. An output signal is capacitively coupled to output port 360 between the filters 356, 358. As shown, filter 356 preferably comprises an LC filter and filter 358 preferably comprises an RC filter. The time constants of these filters are preferably adjusted to the fundamental frequency of operation.

Turning now to FIG. 4, there is shown an oscillator 400 in accordance with another aspect of the present invention. The oscillator 400 includes a three-terminal device 410 that is inductively coupled to a bias voltage source V_(cc) via first terminal 413. The second terminal 415 of the device 410 is inductively coupled to a second voltage source V_(bb). A feedback capacitor C₁ is coupled to third terminal 417 through a resistor R. The third terminal 417 is also coupled to first and second filters, 422, 424, to provide regenerative filtering. In addition, the oscillator includes a slot-cut-microstrip-line-printed board 440 that is coupled to a tuning diode network 442, a resonator 448 and the second terminal 415 of the three terminal device 410. The tuning network 442 includes circuit elements that are similarly arranged as discussed above in relation to tuning network 329.

The resonator 448 is preferably a ceramic resonator and is capacitively coupled to terminal 452 of the slot-cut-microstrip-line-printed board 440. The tuning network 442 and second terminal 415 are similarly coupled to terminals 454 and 456 of the slot-cut-microstrip-line-printed board 440. As shown, the slot-cut-microstrip-line-printed board 440 includes a width, w, a height, h, and length dimensions, l₁ and l₂. The board 440 also includes a slot d that divides the base of the board 440 into two regions defined by length dimensions, l₁ and l₂. These dimensions define the size of the board 440 and can be selected to define the thermal profile of the oscillator. In accordance with this aspect of the present invention, the structure is designed to increase the loaded time average quality factor over the temperature range by selecting an optimum length-width ratio (L/W-ratio) of each side of the slot-cut-microstrip-line coupling-capacitor. In general, the printed board 440 preferably comprises a variable capacitor or storage element that operates as an evanescent mode buffer and allows a user to define a thermal profile.

In particular, the L/W ratio and d may be selected to provide a thermal profile as shown in FIGS. 5–8. For example, as shown in FIG. 5 the thermal profile 500 may be designed to take the shape of a parabola over the operating temperature range of −40° C. to 85° C. The dimensions of the board 440 for providing a parabolic thermal profile as shown in FIG. 5 are as follows: l₁/w₁=1, l₂/w₂=0.5, d=0.01 inch, h=11 mils. In addition, l₁=0.06 inches, w₁=0.06 inches, l₂=0.03 inches, w₂=0.06 inches and e_(r)=10. FIGS. 6–8 may be achieved by adjusting the ratios of l/w. Furthermore, by changing the dimensions of the board, different user definable profiles may be achieved. As shown, in FIG. 6 the thermal profile 600 may take the shape of an inverted parabola. FIGS. 7 and 8 illustrate linear thermal profiles 700, 800. In addition, as shown in FIGS. 7 and 8 the thermal drift is less than 100 kHz.

Turning now to FIG. 9, there is shown an oscillator 900 in accordance with an aspect of the present invention. The oscillator 900 includes similar circuitry to FIG. 5 except that the resonator 910 includes a pair of ceramic resonators coupled in parallel with each other.

FIG. 10 shows a phase noise plot 1000 of an oscillator operating at 1200 MHz in accordance with an aspect of the present invention. As FIG. 10 shows, the phase noise is approximately −110 dBc/Hz at 1 kHz.

A voltage-controlled oscillator implemented in accordance with the present invention may be employed in any number of devices that are used to communicate on data, telephone, cellular or, in general, communications networks. Such devices may include but are not limited to, for example, cellular phones, personal digital assistants, modem cards, lap tops, satellite telephones. As a general matter, the oscillator circuitry shown in the various drawings and described above may be employed in a PLL to either generate a clock signal that may be used to transmit or recover information transmitted or received over a network. In addition to wireless networks, the circuitry of the present invention may be employed in wired networks, satellite networks, etc.

In addition, and in accordance with additional aspects of the present invention, the slot-cut-microstrip-line board or coupling capacitor as described above may be further integrated with coupled resonator oscillators disclosed in commonly assigned U.S. patent application Ser. Nos. 10/912,209 and 10/937,525, the disclosures of which are incorporated by reference herein.

Although the invention herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the present invention. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. 

1. An oscillator, comprising: an active device having first, second and third terminals; circuitry coupled between the first and second terminals of said active device and operative to provide a bias voltage to said active device and feedback a select amount of phase noise into said active device; and a tuning diode network coupled to the second terminal of said active device through a slot-cut-printed-board coupling circuit, the slot-cut-printed-board coupling circuit including a base having a width dimension w, a height dimension h, length dimensions l₁ and l₂, and a slot of width d, the slot dividing the base into two regions defined by l₁ and l₂, and wherein the ratio of l₁/w or l₂/w is selected for a given dielectric constant ε_(r) and the slot width d to define a thermal profile for compensating for thermal drift associated with the oscillator over a tuning voltage range.
 2. The oscillator of claim 1, wherein the slot-cut-printed-board coupling circuit acts as an evanescent mode buffer between a resonator coupled thereto and said active device.
 3. The oscillator of claim 1, wherein the thermal profile comprises a parabolic or linear relationship between frequency and temperature.
 4. The oscillator of claim 1, further comprising a feedback capacitor coupled between the second and third terminals.
 5. The oscillator of claim 1, further comprising a first filter and a second filter coupled to the third terminal of said active device so as to provide two-stage regenerative filtering.
 6. The oscillator of claim 5, further comprising means coupled between said first and second filters for providing an output signal.
 7. The oscillator of claim 1, wherein said active device comprises a field effect transistor and the first, second and third terminals respectively comprise the source, gate and drain nodes of the transistor.
 8. The oscillator of claim 1, wherein said active device comprises a bipolar transistor and the first, second and third terminals respectively comprise the collector, base and emitter nodes of the transistor.
 9. A voltage controlled oscillator, comprising: an active device; and circuitry coupled between a resonator, a tuning diode network and the active device, said circuitry operating as an evanescent mode buffer between the resonator and said active device, the circuitry comprising a slot-cut-printed-board operable to control a thermal drift profile associated with the oscillator, the slot-cut-printed circuit board comprising a base having a width dimension w, a height dimension h, a first length dimension l₁, a second length dimension l₂ and an area having a width dimension d located between the regions defined by l₁ and l₂, and wherein the thermal drift profile is definable by selection of at least one of the length dimensions.
 10. The oscillator of claim 9, wherein the ratio of l₁/w or l₂/w is selected for a given dielectric constant ε_(r) and the width of the area to define a thermal profile for compensating for thermal drift associated with the oscillator over a tuning voltage range.
 11. The oscillator of claim 10, wherein the thermal profile comprises a parabolic or linear relationship between frequency and temperature.
 12. The voltage controlled oscillator of claim 9, wherein the tuning diode network is capacitively coupled to said circuitry.
 13. The voltage controlled oscillator of claim 9, further comprising a network coupled to said active device for biasing said active device.
 14. The voltage controlled oscillator of claim 9, wherein the resonator comprises a ceramic resonator.
 15. The voltage-controlled oscillator of claim 9, wherein the resonator comprises a pair of ceramic resonators coupled in parallel.
 16. The voltage-controlled oscillator of claim 9, further comprising a first filter and a second filter coupled to the active device so as to provide two-stage regenerative filter at an output port of the oscillator.
 17. The voltage controlled oscillator of claim 9, wherein said active device comprises a field effect transistor.
 18. The voltage controlled oscillator of claim 9, wherein said active device comprises a bipolar transistor.
 19. An apparatus, comprising: a phase lock loop for generating a clock signal used to transmit or recover information communicated from or to the apparatus, wherein the phase lock loop includes a voltage-controlled oscillator for generating the clock signal, the voltage controlled oscillator comprising, an active device; and a slot-cut-micro-stripline printed board coupled between a resonator, a tuning diode network and the active device and operable to act as a common-coupling capacitor between the resonator, the tuning diode network and said active device, the slot-cut-printed-board coupling circuit including a base having a width dimension w, a height dimension h, length dimensions l₁ and l₂, and a slot d, the slot d dividing the base into two regions defined by l₁ and l₂, and wherein the ratio of l₁/w or l₂/w is selected for a given dielectric constant ε_(r) and the width of the slot d to define a thermal profile for compensating for thermal drift associated with the oscillator over a tuning voltage range.
 20. The apparatus of claim 19, wherein the apparatus comprises a wireless device.
 21. The apparatus of claim 19, wherein the wireless device is a cellular telephone.
 22. The apparatus of claim 19, wherein the apparatus comprises a personal digital assistant.
 23. A telephone, comprising: a phase lock loop for generating a clock signal used to transmit or recover information communicated from or to the telephone, wherein the phase lock loop includes a voltage-controlled oscillator for generating the clock signal, the voltage controlled oscillator comprising, an active device; and circuitry coupled to a resonator, a tuning diode network and the active device, the circuitry comprising a slot-cut-printed-board operable to control a thermal drift profile associated with the oscillator, the slot-cut-printed circuit board comprising a base having a width dimension w, a height dimension h, a first length dimension l₁, a second length dimension l₂ and a slot having a width dimension d located between the regions defined by l₁ and l₂, and wherein the thermal drift profile is definable by selection of at least one of the length dimensions.
 24. The telephone of claim 23, wherein the information is communicated over a wireless network.
 25. The telephone of claim 23, wherein the information is communicated over a wired network.
 26. A method of defining a thermal profile of an oscillator, comprising coupling a slot-cut-printed board between a resonator, a tuning diode network and an active device, the slot-cut-printed-board including a base having a width dimension w, a height dimension h, length dimensions l₁ and l₂, and a slot of width d, the slot dividing the base into two regions defined by l₁ and l₂; selecting the length to width ratio of the slot-cut-printed-board for a given dielectric constant ε_(r) and slot d to define a thermal profile; and operating the slot-cut-printed board between the resonator and the active device to compensate for drifts in an output frequency of the oscillator due to temperature changes.
 27. The method of claim 26, further comprising biasing the active device at predetermined voltage such that the capacitor maintains the predetermined voltage level to compensate for drifts in an output frequency of the oscillator due to temperature changes.
 28. The method of claim 26, wherein the evanescent mode buffer compensates for drifts in the output frequency of the oscillator due to temperature changes by storing additional energy generated by the oscillator due to temperature changes. 